High-Accuracy based on Deep Learning Techniques for Pattern Recognition of Wafer Defect

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Dr. Dinesh Yadav

Abstract

In semiconductor production, automated wafer defect pattern detection is a crucial procedure that improves product quality, yield, and efficiency. The paper introduces a powerful deep learning-powered system of classifying wafer defects based on a 1D-Convolutional Neural Network (1D-CNN). The WM-811K wafer map dataset, the biggest publicly available dataset based on actual wafer manufacturing processes in industry, is used to assess the suggested approach. Data analysis and visualization are first conducted comprehensively regarding the distribution of wafer index, frequencies of defects and patterns of spatial failures. A large preprocessing pipeline is used to guarantee the reliability and consistency of data, such as data cleaning, filtering out non-defective and inaccurate samples of failure types, remapping pixel values to grayscale, converting the grayscale to RGB, image resizing and data augmentation. These procedures are highly successful in raising dataset quality and model generalization. The 1D-CNN model is trained to efficiently acquire discriminative defect features after the filtered data is divided into training and testing data. The following measures are used to evaluate the model's performance: accuracy, precision, recall, F1-score, loss, and AUC-ROC. Results of the experiment indicate that the suggested 1D-CNN has 99.0% accuracy and 99.0% AUC-ROC, which is superior to several other cutting-edge methods. The results indicate the practical applicability, soundness, and efficacy of the suggested framework in automated inspection of defects in the wafer of semiconductor manufacturing.

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Research Paper

How to Cite

High-Accuracy based on Deep Learning Techniques for Pattern Recognition of Wafer Defect. (2026). Journal of Global Research in Electronics and Communications(JGREC), 2(2), 22-27. https://doi.org/10.5281/

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